"RoHS vs. Reach - Managing and Understanding the Information Gap" (Keynote Address) Presented By: Tom Keyserlingk
As Director of IHS’ NA Compliance Practice, Tom Keyserlingk will discuss the escalating pressures facing OEMs and the growing information gap impacting business performance related to regulatory and legislative compliance. What actions have OEMs taken to deal with the immediate challenges caused by RoHS, PB-free conversions and parts obsolescence. Do these activities scale in the context of RoHS v2 and REACH? What automated and due diligence processes have OEMs implemented to support and protect top line revenue?
Tom Keyserlingk is Director, North American Compliance Practice, within IHS’ Product Lifecycle information business group domain.
"Impact of Signal Analysis on EMI Performance" Presented by: Bruce Archambeault, Ph.D.
This presentation will focus on the basic concepts of inductance, “ground”, return current path, and power plane decoupling, in order to reduce the confusion and de-mystify that often surrounds these topics. Standard design practices will be examined for their ‘correctness’ based on fundamental physics (without the need for messy equations) so the audience will better appreciate ‘how things work’ and better reduce the dependence of magic.
Dr. Archambeault has authored or co-authored a number of papers in computational electro-magnetics, mostly applied to real-world EMC applications. He is currently a member of the Board of Directors for the IEEE EMC Society and a past Board of Directors member for the Applied Computational Electro-magnetics Society (ACES). He has served as a past IEEE/EMCS Distinguished Lecturer. He is the author of the book “PCB Design for Real-World EMI Control” and the lead author of the book titled “EMI/EMC Computational Modeling Handbook”.
"DFx - Design Elements You Can't Ignore" Presented By: Dale Lee
Due to these evolutionary changes in technology, many of elements in the product design and assembly process which did not impact operational performance or manufacturability can no longer be ignored. This presentation will highlight examples of several elements within product design process (PCB and assembly), manufacturing tooling design, SMT and PTH assembly opportunities that may impact functional reliability, process deployment and yield improvement.
Dale is a recognized author, instructor and speaker on advanced SMT packaging, PCB and SMT design, assembly, DFX and rework. He is Surface Mount Technology Association’s 2008 “Excellence in Leadership” award winner. He has been very involved with SMTA for many years and has helped to form chapters and has served as local chapter officer, as SMTA Board of Director and Chairman of the Planning Committee for SMTA.
"PCB Crosstalk Findamentals and Strategy" Presented By: Stephen Scearce
Understanding and controlling crosstalk is becoming more and more important in PCB designs. This presentation will discuss the current tools and strategy for dealing with crosstalk at the PCB level. We will explore the fundamentals of crosstalk for traces and touch on via crosstalk. We will also examine the use of the Allegro crosstalk system to help control crosstalk in our designs.
Stephen Scearce is the manager of the High Speed Design team at Cisco System Inc. Prior to working at Cisco, Stephen worked for NASA Langley research center as a research engineer in the Electro-magnetics research branch High intensity Radiated Fields Lab team. His research interests include power and signal integrity full channel design. Stephen has 3 US patents and 2 pending patents. He received his BS and MSEE from Old Dominion University, Norfolk, VA.
"Reliability and Failure Mechanisms of Laminate Substrates with Plated interconnections - the effect of Via Structure and Materials in a Pb-Free World" Presented By: Kevin Knadle
This presentation uses current induced thermal cycling (CITC) test results to compare fatigue life and failure mechanisms for a wide range of plated via interconnections from large holes to micro-vias, and including the effect of structure, materials, hole making processes, surface finishes, Pb free assembly temperatures, and thermal cycle test temperatures. The origin of PTV induced laminate failures such as ‘eyebrow cracks’ and Pb free related delamination is also explored. In addition to life data and failure analysis, CITC Is used to produce high magnification video clips of actual via displacements and failure mechanisms during thermal cycling to further illustrate and compare the reliability challenges involved in laminate substrates with plated interconnections.
Kevin Knadle is senior engineer who has 24 years experience with reliability engineering and testing on all levels of electronic packaging. He holds 13 US patents, and has authored a number of technical papers on PTV and solder joint reliability. Kevin received his BS in Materials Science and Engineering from the MIT (1983), and MS in Mechanical Engineering from Binghamton University (1995.)
