Technical Session #1 (8:30pm - 10:00pm) Presenter: Dr. Bruce Archambeault
Biography: Dr. Bruce Archambeault is an IBM Distinguished Engineer at IBM in Research Triangle Park, NC. He received his B.S.E.E degree from the University of New Hampshire in 1977 and his M.S.E.E degree from Northeastern University in 1981. He received his Ph. D. from the University of New Hampshire in 1997. His doctoral research was in the area of computational electromagnetics applied to real-world EMC problems.
Dr. Archambeault has authored or co-authored a number of papers in computational electromagnetics, mostly applied to real-world EMC applications. He is currently the IEEE EMC Society Technical Activities Chair, a past member of the Board of Directors for the IEEE EMC Society and a past Board of Directors member for the Applied Computational Electromagnetics Society (ACES). He has served as a past IEEE/EMCS Distinguished Lecturer. He is the author of the book “PCB Design for Real-World EMI Control” and the lead author of the book titled “EMI/EMC Computational Modeling Handbook”.
Abstract:How to avoid the main cause of EMI problems on multi-layer PCBs Multi-layer PCBs typically contain a large number of different high speed signals. Successful routing of all these signals often require some of the standard EMC “rules” to be violated. However, not all of these EMC rules are equal, that is, some are more important than others. Understanding where the current flows is the first step to understanding which EMC design rules are the most important, and should receive the most effort and attention.
For effective PCB design to control EMC, the current return path is the main concern. Designing PCBs with this in mind makes EMC emissions control much easier. Understanding inductance, and the true meaning on ‘ground’ helps designers get the design right the first time.
Technical Session #2 (10:00pm - 11:30pm) Presenter: Rick Hartley
Biography: Rick Hartley is a Senior Principal Engineer at L-3 Communication, Avionics Systems.He is also the principal of Hartley Enterprises, through which he consults and teaches internationally to resolve noise, signal integrity and EMI problems.Rick’s focus is on correct design of PC boards to prevent and solve problems.He has consulted with major corporations in the US and nine other countries.His design career has focused on circuits and PC boards for computers, aircraft avionics and telecommunications.Rick has a degree in engineering from Ohio Technical Institute and 44 years of experience in electronics.He has dedicated the past 34 years to PC board and circuit development with emphasis on control of noise, in both Digital and RF circuits.He is a past member of the Editorial Review Board of Printed Circuit Design Magazine and has written numerous technical papers on methods to control EMI and signal integrity.He is currently on the IPC Designers Council Executive Board, the Education Committee and is Chairman of the Design Committees. Rick is a past international chairman of the IPC Designers Council.
Abstract: The Truth about Differential Pairs
Differential Pairs have been used in PC boards for years to carry high speed serial data and occasionally for parallel data, in a variety of bus formats.Many PC board designers and engineers believe the rules for differential pairs are the same in a PCB as they are in cable or twisted pair of wires.This is often NOT the case!
This course will cover the advantages of differential pairs vs single ended lines, which differential pair format gives the best impedance control, what is the right spacing between the lines of a pair, crosstalk between differential pairs and single ended lines, what’s important in differential pair routing, how much skew is really acceptable, the impact of material type and the impact of vias on signal integrity.
Technical Session #3 (1:30pm - 3:00pm) Presenter: Stephen Scearce
Biography: Stephen Scearce is the manager of the Systems and Silicon Engineering High Speed Design team at Cisco Systems Inc. Stephen has worked for Cisco for more than 8.5 years in the Signal integrity and EMC field. Prior to working at Cisco, Stephen worked for NASA LaRC as a research engineer in the Electromagnetic Research Branch HIRF team. Stephen has 3 US patents and 2 pending patents. He received his BSET and MSEE from Old Dominion University, Norfolk VA.
Abstract:PCB Level Power Integrity Design from pre-layout to post route Power integrity is a growing concern in the design community today. Next generation IC current is increasing at an alarming pace, while the voltages are being reduced to save power. This faces the design community with a new set of challenges. These low voltage parts impose more stringent voltage drop/ripple requirement on our PCB and package designs. We will examine the DC (IR drop) and AC power integrity (PI) analysis used in our design process. Real life design examples will be shown and we will explore Cad solutions to these challenging problems.
Presentation Authors: Chong Ding; Bob Evans; Quinn Gaumer; Subramanian Ramanathan; Goutham Sabavat; Stephen Scearce; Doug White
Technical Session #4 (3:30pm - 5:00pm) Presenter: Charles Pfeil
Biography: Charles Pfeil is an Engineering Director at Mentor Graphics, Systems Design Division. He was the original product architect for Expedition PCB and is an inventor of XtremePCB, TeamPCB and XtremeAutoRoute. Charles has been in the PCB industry over 40 years as a designer, owner of a service bureau, and has also worked in marketing and/or engineering management at Racal-Redac, ASI, Cadence, PADS, and VeriBest. He can be contacted through email at charles_pfeil@mentor.com Abstract:BGA Breakouts and Routing; Effective Design Methods for very large BGAs This session will present methods to effectively route large and dense BGAs on fewer layers with a focus on the breakouts. These principles for increasing route density in a variety of layer stackups and via spans are presented independent of specific PCB design tools and may be applied with any BGA design challenge. - Choosing the appropriate fanout patterns for routing BGAs can enable fewer layers and better signal integrity - When using HDI, many options are available for fanout patterns - This session demonstrates different fanout patterns in the context of HDI stackups and how they can be successfully applied on large dense BGAs - At the end of the presentation, the BGA Breakout capabilities in Mentor’s Expedition PCB will be demonstrated.
